JTAG Explained

Posted by admin On December - 2 - 2016

 JTAG Explained

 

JTAG is a computer hardware interface which allows the personal computer to communicate with the chips directly on the board. It was uniquely developed to help eliminate the challenges witnessed in testing of the printed circuit boards by the joint test access group. JTAG has steadily become popular and was integrated in processor called Intel 80486 and later coded IEEE 1491. It is used for programming, debugging and testing of the embedded devices. The processors use JTAG to ensure access to emulation or debug functions while CPLDs and FPGAs use it for the programming functions. This article, therefore, discusses the in detail the JTAG and how it is used.

 

Boundary scanning

JTAG help debug, test and diagnose all the modern systems. It enables you to write and read individual bits on the specific pins pf the specific chips on the board. The boundary scan cells have no impact on the device and its operation while in the functional mode. In test mode the boundary scan cells disconnect the functional core of the machine from the pins. Setting the boundary scan cells in the test mode help control the values onto a net from enabled device and monitor the net value. Disconnecting from the functional mode makes it easy to scan the test development. The boundary scan can be used in two ways when testing the board. In the first way the connection testing ensures superb coverage especially for short circuiting. In the second mode allows for the extension of the coverage by facilitating communication between the JTAG devices on the board and the non JTAG devices on the periphery.

 

Interface signals

The JTAG interface uses several signals to aid the boundary scan operations. These include;

Test Clock signal-synchronizes the operations of the internal state machine.

Test Mode Select signal- help in the determination of the proceeding state.

Test Data In signal-it is a representative of the programming logic or data in the device test.

Test Data Out signal-represents the data from the programming logic and the device test.

Test Reset signal- can help reset the state machine of the TAP controller.

 

Registers

 

The instruction register of the boundary scan help hold the current instructions while the data registers are of three types. The BSR help move data to and from the pins of the machine. The BYPASS register moves message from Test Data In to Test Data Out. IDCODES register holds the revision numbers and the ID codes of the device.

 

Test Access Port (TAP) Controller

This is a device that is controlled by TSM signal hence controlling the JTAG behavior signal. The operated data depend on the instruction register’s loaded value.

Boundary Scan Instructions

There are several sets of instructions defined by IEEE 1149.1 standard which include;

BYPASS instruction links TDO and TDI lines.

EXTEST instruction links TDO and TDI to Boundary Scan Register.

SAMPLE/PRELOAD instruction links TDO and TDI to the BSR.

In conclusion, JTAG is a suitable interface in the embedding of the devices. The information on the JTAG is enormous and this article will help you consider the use of JTAG in order to enjoy the numerous opportunities.

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